An integrated circuit is typically formed on a substrate by the sequential deposition of conductive, semiconductive or insulative layers on a silicon wafer. One fabrication step involves depositing a filler layer over a non-planar surface, and planarizing the filler layer until the non-planar surface is exposed. For example, a conductive filler layer can be deposited on a patterned insulative layer to fill the trenches or holes in the insulative layer. The filler layer is then polished until the raised pattern of the insulative layer is exposed. After planarization, the portions of the conductive layer remaining between the raised pattern of the insulative layer form vias, plugs and lines that provide conductive paths between thin film circuits on the substrate. In addition, planarization is needed to planarize the substrate surface for photolithography.
Chemical mechanical polishing (CMP) is one accepted method of planarization. This planarization method typically requires that the substrate be mounted on a carrier head. The exposed surface of the substrate is placed against a rotating polishing pad. The carrier head provides a controllable load on the substrate to push it against the polishing pad. A polishing liquid, such as a slurry with abrasive particles, is supplied to the surface of the polishing pad.
One problem in CMP is determining whether the polishing process is complete, i.e., whether a substrate layer has been planarized to a desired flatness or thickness, or when a desired amount of material has been removed. Overpolishing (removing too much) of a conductive layer or film may lead to increased circuit resistance. On the other hand, underpolishing (removing too little) of a conductive layer may lead to electrical shorting. Variations in the initial thickness of the substrate layer, the slurry composition, the polishing pad condition, the relative speed between the polishing pad and the substrate, and the load on the substrate can cause variations in the material removal rate. These variations cause variations in the time needed to reach the desired thickness and polishing endpoint. Therefore, the polishing endpoint cannot be determined merely as a function of polishing time.